In recent years, as cloud computing and the like have become popular along with the progress in manufacturing technique for semiconductor devices, it happens more often that a plurality of information processing devices each including a storage device is mutually connected via a network so as to work as one information processing system. Moreover, a storage device which is higher in speed than a conventional storage device utilizing HDD is known. The higher-speed storage device is formed by connecting a number of DRAM chips or NAND flash chips with inter-chip wires.
In such a single information system formed by connecting the plural information processing devices, the performance is improved by increasing the number of information processing devices constituting the system. In a large-scaled information processing system with a large number of devices, however, problems occur in that the performance as expected cannot be achieved and the management of the system requires a large amount of time, effort and cost.
As a solution to the problems, a storage device formed by connecting a plurality of memory nodes with a data transfer function has been suggested so far. In such a storage device, each memory node performs a predetermined process such as readout or writing upon the reception of a data packet addressed thereto, and if the memory node receives a packet not addressed thereto, the memory node transfers the received packet to another appropriate memory node. By repeating the appropriate transfer among the memory nodes, the data packet can reach the target memory node. Such a structure provides an advantage of facilitating the design even though the storage device is large-scaled.
Even such a technique is employed, however, other problems occur in that, if a large-scaled system including a plurality of boards, cases, or racks is configured, the desired high performance cannot be obtained or the operation of the system is difficult at the scale out.